ASIC Engineer, Design Verification

**Summary:**

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a team working with the best in the industry, focused on developing cutting-edge ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will be using other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.

**Required Skills:**

ASIC Engineer, Design Verification Responsibilities:

1. Define and implement block/IP/System on Chip (SoC) verification plans, build verification test benches to enable block/IP/sub-system/SoC level verification

2. Develop functional tests based on verification test plan

3. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage

4. Debug, root-cause and resolve functional failures in the design, partnering with the Design team

5. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality

**Minimum Qualifications:**

Minimum Qualifications:

6. Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta

7. 3+ years of hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification

8. 3+ years experience in block/IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies

9. Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments

10. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

**Preferred Qualifications:**

Preferred Qualifications:

11. Track record of 'first-pass success' in Application-Specific Integrated Circuit (ASIC) development cycles

12. Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle

13. Experience in development of Universal Verification Methodology (UVM) based verification environments from scratch

14. Experience with Design verification of Data-center applications like Video, Artificial Intelligence/Machine Learning (AI/ML) and Networking designs

15. Experience with revision control systems like Mercurial(Hg), Git or SVN

16. Experience with verification of Advanced RISC Machines/Reduced Instruction Set Computing Five (ARM/RISC-V) based sub-systems or System-on-Chip (SoCs)

17. Experience with IP or integration verification of high-speed interfaces like Peripheral Component Interconnect Express (PCIe), Double Data Rate (DDR), Ethernet

**Public Compensation:**

$114,000/year to $166,000/year + bonus + equity + benefits

**Industry:** Internet

**Equal Opportunity:**

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.