Standard Cell Circuit Design Engineer
+ We are looking for applicants with 0 - 5 years of experience in Standard Cell circuit design of high-performance flip flops, level shifters, retention flops and other complex circuits.
+ Strong understanding of CMOS device characteristics and design rules.
+ Knowledge of deep submicron process issues & Finfet Technologies is a plus.
+ Strong understanding of Digital circuits & optimization for better PPA.
+ Good layout design knowledge & parasitic optimization in various types of layouts.
+ Hands-on experience running SPICE simulations and high sigma variation analysis.
+ Understanding of Timing characterization & modeling of Standard cell circuits.
+ Strong proficiency in scripting languages like Perl, Python, and Tcl.
+ Great teammate with good communication and analytical skills.
Imagine yourself at the center of our cutting-edge processor design in deep submicron technologies, and on standard cell library designs. You will drive concepts of transistor level circuit design, modeling and performance analysis, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers. As a Standard Cell Design Engineer for the custom circuits team, you will perform the following: • Drive library architecture discussion & optimization effort to improve overall Library PPA. • Drive layout optimization effort by identifying & reducing parasitics to push circuit PPA. • Work on Library PPA for different technology, architecture, PDK releases. • Develop standard cell circuits that push design PPA. • Engage with CPU, SOC and GPU teams on physical design requirements.
**Education & Experience**
BSEE / MSEE is required.
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