Silicon Validation Triage Engineer
+ System-level understanding of CPU/SoC architecture, DRAM/memory, and boards.
+ Experience with Silicon chip bringup, validation and debug.
+ Enjoy hands-on debug and problem-solving.
+ Patient and disciplined problem-solving skills in the face of partial data.
+ Good understanding of typical Silicon debug features and techniques.
+ Clear and concise interpersonal skills.
+ Effective collaboration across teams.
+ Understanding of system software and kernel concepts.
+ Moderate UNIX command line and scripting skills.
+ ADDITIONAL DESIRABLE QUALIFICATIONS:
+ Knowledge of SoC and IP design flows.
+ Knowledge and use of lab measurement and analytical equipment.
+ IP block-level knowledge.
+ Knowledge of manufacturing test flows and steps.
+ Knowledge of SOC validation concepts.
+ C, Assembly, UNIX system programming.
+ Kernel and device driver programming and concepts.
In this role, your goal is to quickly and effectively process incoming units that failed some software test where the failure is believed to be in hardware. Tests range from apps to synthetic or focused validation content including software meant to stress specific blocks or subsystems within the SoC. We work on a variety of failing content and you should have the ability to efficiently narrow down failures from system-level to subsystem- and block-level using a range of debug tools and techniques. You will use diagnostic software tools from content experts. You will enhance and maintain the debug/triage methodology and associated automation scripts. You will have opportunities to work with experts from many teams to understand SoC and system behavior: iOS kernel/driver, Silicon Validation IP test SW, Factory diagnostics, SoC architecture, SoC IP design and verification, FPGA Prototyping, Systems Integration, board designers, etc.
**Education & Experience**
BS/MS in Computer Engineering or Electrical Engineering or equivalent is required.
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